Maker : Philips
Part No. : 74HC04

  Datasheet PDF : 74HC04.pdf
  Cross Reference : 74HC04 Cross Reference
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Product Information

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT04 Hex inverter Product specification File under Integrated Circuits, IC06 September 1993 Philips Semiconductors Product specification Hex inverter FEATURES • Output capability: standard • ICC category: SSI GENERAL DESCRIPTION 74HC/HCT04 The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT04 provide six inverting buffers. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz Σ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PARAMETER propagation delay nA to nY input capacitance power dissipation capacitance per gate notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 7 3.5 21 8 3.5 24 HCT ns pF pF UNIT September 1993 2 Philips Semiconductors Product specification Hex inverter PIN DESCRIPTION PIN NO. 1, 3, 5, 9, 11, 13 2, 4, 6, 8, 10, 12 7 14 SYMBOL 1A to 6A 1Y to 6Y GND VCC NAME AND FUNCTION data inputs data outputs ground (0 V) positive supply voltage 74HC/HCT04 Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. FUNCTION TABLE INPUT nA L H Notes 1. H = HIGH voltage level L = LOW voltage level OUTPUT nY H L Fig.5 Fig.4 Functional diagram. Logic diagram (one inverter). September 1993 3 Philips Semiconductors Product specification Hex inverter DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: SSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) 74HC SYMBOL PARAMETER +25 min. tPHL/ tPLH propagation delay nA to nY output transition time typ. 25 9 7 19 7 6 max. 85 17 14 75 15 13 −40 to +85 min. max. 105 21 18 95 19 16 −40 to +125 min. max. 130 26 22 110 22 19 ns UNIT 74HC/HCT04 TEST CONDITIONS VCC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 Fig.6 tTHL/ tTLH ns Fig.6 September 1993 4 Philips Semiconductors Product specification Hex inverter DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: SSI 74HC/HCT04 Note to HCT types The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To determine ∆ICC per unit, multiply this value by the unit load coefficient shown in the table below. INPUT nA AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (°C) 74HCT SYMBOL PARAMETER +25 min. tPHL/ tPLH tTHL/ tTLH propagation delay nA to nY output transition time typ. 10 7 max. 19 15 −40 to +85 min. max. 24 19 −40 to +125 min. max. 29 22 ns ns 4.5 4.5 Fig.6 Fig.6 UNIT VCC (V) WAVEFORMS TEST CONDITIONS UNIT LOAD COEFFICIENT 1.20 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC HCT: VM = 1.3 V; VI = GND to 3 V Fig.6 Waveforms showing the data input (nA) to data output (nY) propagation delays and the output transition times. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. September 1993 5 ...

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