Maker : Freescale Semiconductor
Part No. : 908E621

  Datasheet PDF : 908E621.pdf
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Product Information

Freescale Semiconductor Technical Data Document Number: MM908E621 Rev 4.0, 6/2007 Integrated Quad Half-Bridge and Triple High-Side with Embedded MCU and LIN for High End Mirror The 908E621 is an integrated single-package solution that includes a high-performance HC08 microcontroller with a SMARTMOSTM analog control IC. The HC08 includes flash memory, a timer, enhanced serial communications interface (ESCI), an analog-to-digital converter (ADC), serial peripheral interface (SPI) (only internal), and an internal clock generator module. The analog control die provides four half-bridge and three high-side outputs with diagnostic functions, a Hall-Effect sensor input, analog inputs, voltage regulator, window watchdog, and local interconnect network (LIN) physical layer. The single-package solution, together with LIN, provides optimal application performance adjustments and space-saving PCB design. It is well suited for the control of automotive high-end mirrors. Features • • • • • • • • • • • • High-Performance M68HC908EY16 Core 16 K Bytes of On-Chip Flash Memory, 512 Bytes of RAM Internal Clock Generator Module (ICG) Two 16-Bit, 2-Channel Timers 10-Bit Analog-to-Digital Converter (ADC) LIN Physical Layer Interface Autonomous MCU Watchdog / MCU Supervision One Analog Input with Switchable Current Source Four Low RDS(ON) Half-Bridge Outputs Three Low RDS(ON) High-Side Outputs Wake-Up Input One 2/3-Pin Hall-Effect Sensor Input • 12 Microcontroller I/Os >22µF 100nF 908E621 QUAD HALF-BRIDGE AND TRIPLE HIGHSIDE SWITCH WITH EMBEDDED MCU AND LIN DWB SUFFIX 98ARL10519D 54-TERMINAL SOICW-EP ORDERING INFORMATION Device MM908E621ACDWB/R2 Temperature Range (TA) -40°C to 85°C Package 54 SOICW-EP www.DataSheet4U.com LIN VSUP[1:8] L0 Wake Up Input VDDA/VREFH EVDD VDD 4,7µF 100nF HB1 HB2 M M 4 x Half Bridge Outputs VSSA/VREFL EVSS VSS RST_A RST IRQ_A IRQ PTA0/KBD0 PTA1/KBD1 PTA2/KBD2 PTA3/KBD3 PTA4/KBD4 PTB3/AD3 PTB4/AD4 PTB5/AD5 PTC2/MCLK PTC3/OSC2 PTC4/OSC1 HB3 M HB4 HS1 HS2 HS3 High Side Output 1 High Side Output 2 High Side Output 3 µC PortA µC PortB µC PortC Internally connected HVDD A0 A0CST H0 Switched 5V output Analog Input with current source Analog Input current source trim 2-/3-pin hall sensor input Pull to ground for user mode µC PortD Internally connected PTD0/TACH0 PTD1/TACH1 PTE1/RxD GND[1:4] EP µC PortE TESTMODE Figure 1. 908E621 Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2007. All rights reserved. 2 VSSA/VREFL EVSS IRQ GND[1:4] VSUP[1:8] TESTMODE RST_A IRQ_A PTD0/TACH0 PTE1/RXD RST LIN Single Breakpoint Break Module Voltage Regulator PTE1/RXD PTE0/TXD TXD LIN Physical Layer Wakeup Port Reset Control High Side Driver & Diagnostic Switched VDD Driver & Diagnostic RXD 5-Bit Keyboard Interrupt Module 2-channel Timer Interface Module A 2-channel Timer Interface Module B Enhanced Serial Communication Interface Module Autonomous Watchdog Computer Operating Properly Module Serial Peripheral Interface Module Configuration Register Module Periodic Wake-up Timebase Module Arbiter Module Prescaler Module PTC1/MOSI Security Module BEMF Module PTA5/SPSCK PTC0/MISO PTA6/SS MISO MOSI SPSCK SS PTD0/TACH0 PWM HB2 Half Bridge Driver & Diagnostic VSS VDD HVDD L0 HS1[a:b] High Side Driver & Diagnostic HS2 High Side Driver & Diagnostic HS3 Internal Bus 24 Integral System Integration Module Single External IRQ Module Half Bridge Driver & Diagnostic HB1 Power-ON Reset Module SPI & CONTROL 908E621 EVDD INTERNAL BLOCK DIAGRAM VDDA/VREFH M68HC08 CPU CPU ALU Registers PTA0/KBD0 Control and Status Register, 64 Bytes User Flash, 15,872 Bytes User RAM, 512 Bytes Monitor ROM, 310 Bytes Flash programming (Burn-in), ROM 1024 Bytes PTA1/KBD1 User Flash Vector Space, 36 Bytes PTA2/KBD2 OSC2 Internal Clock OSC1 Gen...

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