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128K X 8 BIT HIGH SPEED CMOS SRAMMaker : AMIC Technology
Shortcut : A6173081S-12 A6173081S-15 |
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A6173081 Series Preliminary Document Title 128K X 8 BIT HIGH SPEED CMOS SRAM Revision History Rev. No. 0.0 128K X 8 BIT HIGH SPEED CMOS SRAM History Initial issue Issue Date July 14, 2000 Remark Preliminary PRELIMINARY (July, 2000, Version 0.0) AMIC Technology, Inc. A6173081 Series Preliminary Features n n n n Center power pinout Supply voltage: 5V±10% Access times: 12/15 ns (max.) Current: Operating: -12: 170mA (max.) -15: 165mA (max.) Standby: TTL: 25mA (max.) CMOS: 8mA (max.) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL compatible Common I/O using three-state output Data retention voltage: 3V (min.) Available in 32-pin 300mil / 400mil SOJ packages 128K X 8 BIT HIGH SPEED CMOS SRAM General Description The A6173081 is a high-speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a 5V power supply. It is built using high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when chip enable is disable, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 3V. Pin Configurations n SOJ A0 A1 A2 A3 CE I/O 0 I/O 1 VCC GND I/O 2 I/O 3 WE A4 A5 A6 A7 1 2 3 4 5 32 31 30 29 28 A16 A15 A14 A13 OE I/O 7 I/O 6 GND VCC I/O5 I/O 4 A12 A11 A10 A9 A8 A6173081S(SW) 6 7 8 9 10 11 12 13 14 15 16 27 26 25 24 23 22 21 20 19 18 17 PRELIMINARY (July, 2000, Version 0.0) 1 AMIC Technology, Inc. A6173081 Series Block Diagram A0 ADDRESS DECODER A16 1,048,576-BIT MEMORY ARRAY I/O0 - I/O 7 8 I/O CONTROL 8 8 WE OE CE CONTROL LOGIC Pin Descriptions – SOJ Pin No. 1-4, 13-21, 29-32 6-7, 10-11, 22-23, 26-27 5 28 12 8, 24 9, 25 Symbol A0 - A16 I/O0 - I/O7 Description Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Power Supply Ground CE OE WE VCC GND PRELIMINARY (July, 2000, Version 0.0) 2 AMIC Technology, Inc. A6173081 Series Recommended DC Operating Conditions (TA = 0°C to + 70°C) Symbol VCC GND VIH VIL CL Parameter Supply Voltage Ground Input High Voltage Input Low (1) Voltage Output Load Min. 4.5 0 2.2 -0.5 Typ. 5.0 0 0 Max. 5.5 0 VCC + 0.5 +0.8 30 Unit V V V V pF Absolute Maximum Ratings* VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V IN, IN/OUT Volt to GND . . . . . . . . . . -0.5V to VCC +0.5V Operating Temperature, Topr . . . . . . . . . . . 0°C to +70°C Storage Temperature, Tstg . . . . . . . . . . -55°C to +125°C Temperature Under Bias, Tbias . . . . . . . . -10°C to +85°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . . 1.0W *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics Symbol Parameter (TA = 0°C to + 70°C, VCC = 5V ± 10%, GND = 0V) A6173081-12 Min. Max. 2 2 A6173081-15 Min. Max. 2 2 µA µA VIN = GND to VCC CE = VIH, OE = VIH VI/O = GND to VCC CE = VIL, II/O = 0 mA Min. Cycle, Duty = 100% CE = VIH CE ≥ VCC - 0.2V, VIN ≥ VCC -0.2V or VIN ≤ 0.2V IOL = 8 mA IOH = -4 mA Unit Conditions ILI ILO Input Leakage Output Leakage - ICC1 (2) ISB Dynamic Operating Current - 170 25 - 165 25 mA mA ISB1 VOL VOH Standby Power Supply Current Output Low Voltage Output High Voltage 2.4 8 0.4 - 2.4 8 0.4 - mA V V Notes: 1. VIL = -3.0V for pulses less than 20 ns. 2. ICC1 is dependent on output loading, cycle rates, and Read/Write patterns. PRELIMINARY (July, 2000, Version 0.0) 3 AMIC Technology, Inc. A6173081 Series Truth Tab... |
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