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32K X 8 BIT CMOS SRAMMaker : AMIC Technology
Shortcut : A625308 A625308A A625308A-70S A625308A-70SI A625308A-70SU A625308AM-70S A625308AM-70SI A625308AM-70SU A625308AV-70S A625308AV-70SI A625308AV-70SU |
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www.DataSheet4U.com A625308 Series Preliminary Document Title 32K X 8 BIT CMOS SRAM Revision History Rev. No. 0.0 0.1 0.2 32K X 8 BIT CMOS SRAM History Initial issue Erase 28-pin DIP package type Erase 55ns part Issue Date June 30, 1998 May 21, 1999 December 1, 2000 Remark Preliminary PRELIMINARY (December, 2000, Version 0.2) AMIC Technology, Inc. A625308 Series Preliminary Features n External Operating Voltage: 4.5V to 5.5V n Access times: 70 ns (max.) n Current: A625308-L series: Operating: 70mA (max.) Standby: 100µA (max.) A625308-S series: Operating: 70mA (max.) Standby: 25µA (max.) n n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL compatible Common I/O using three-state output Data retention voltage: 2.0V (min.) Available in 28-pin SOP and TSOP (forward and reverse type) packages 32K X 8 BIT CMOS SRAM General Description The A625308 is a low operating current 262,144-bit static random access memory organized as 32,768 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Minimum standby power is drawn by this device when CE is at a high level, independent of the other input levels. Data retention is guaranteed at a power supply voltage as low as 2.0V. Pin Configurations n SOP n TSOP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND 1 2 3 4 5 28 27 26 25 24 VCC WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 6 7 8 9 10 11 12 13 14 23 22 21 20 19 18 17 16 15 ~ ~ A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~ ~ ~ ~ OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ~ ~ A625308V 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 A625308M A625308R 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A2 A1 A0 I/O0 I/O1 I/O2 VSS I/O3 I/O4 I/O5 I/O6 I/O7 CE A10 PRELIMINARY (December, 2000, Version 0.2) 1 AMIC Technology, Inc. A625308 Series Block Diagram A5 VCC GND ROW 512 X 512 MEMORY ARRAY A9 A11 A14 DECODER I/O0 COLUMN I/O INPUT DATA CIRCUIT COLUMN DECODER I/O7 A0 A4 A10 CE OE WE CONTORL CIRCUIT Pin Descriptions - SOP Pin No. 1-10, 21, 23-26 11-13, 15-19 14 20 22 27 28 Symbol A0 - A14 I/O0 - I/O7 GND CE OE WE Pin Description-TSOP Description Address Input Data Inputs/Outputs Ground Chip Enable Output Enable Write Enable Power Supply Pin No. 1 2-5, 8-17, 28 7 6 18-20, 22-26 21 27 Symbol OE Description Output Enable Address Input Power Supply Write Enable Data Inputs/Outputs Ground Chip Enable A0 - A14 VCC WE I/O0 - I/O7 GND CE VCC PRELIMINARY (December, 2000, Version 0.2) 2 AMIC Technology, Inc. A625308 Series Recommended DC Operating Conditions (TA = 0°C to + 70°C) Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.3 Typ. 5.0 0 3.5 0 Max. 5.5 0 VCC + 0.3 +0.8 Unit V V V V Absolute Maximum Ratings* VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V Operating Temperature, Topr . . . . . . . . . . 0°C to +70°C Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . 0.7W Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec *Comments Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC Electrical Characteristics (TA = 0°C to + 70°C, VCC = 5.0V ± 10%, GND = 0V) Symbol Parameter A625308-70L Min. ILI Input Leakage Current Output ... |
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