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Part No. : A62S7308BX-70S

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A62S7308B Series Preliminary Document Title 128K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 0.1 128K X 8 BIT LOW VOLTAGE CMOS SRAM History Initial issue Change max. power supply voltage from 3.3V to 3.6V Change min. VIH from 2.2V to 2.4V Add feature “Interfaces directly with 3.3V typ. logic chip” Remove A62S7308B-10S/SI part Issue Date September 5, 2000 October 12, 2000 Remark Preliminary 0.2 Add A62S7308B-55S/SI part Change Input Pulse Levels from 0.4V~2.4V to 0V~3.0V in AC Test Conditions table March 9, 2001 PRELIMINARY (March, 2001, Version 0.2) AMIC Technology, Inc. A62S7308B Series Preliminary Features n Power supply range: 2.7V to 3.6V n Access times: 55ns (max.): for VCC = 3.0V to 3.6V 70ns (max.): for VCC = 2.7V to 3.6V n Current: A62S7308B-S series: Operating: 30mA (max.) Standby: 5µA (max.) A62S7308B-SI series: Operating: 30mA (max.) Standby: 10µA (max.) n Extended operating temperature range: -25°C to 85°C for -SI series n n n n Full static operation, no clock or refreshing required All inputs and outputs are directly TTL compatible Common I/O using three-state output Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32-pin SOP, TSOP, sTSOP (8X 13.4mm) forward type and 36-ball Mini BGA (6X8) packages n Interfaces directly with 3.3V typ. logic chip 128K X 8 BIT LOW VOLTAGE CMOS SRAM General Description The A62S7308B is a low operating current 1048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power supply voltage from 2.7V to 3.6V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for power down and a device enable and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations n SOP n TSOP/(sTSOP) (forward type) n Mini BGA (6X8) Top View NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O 0 I/O 1 I/O 2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 VCC CE2 WE A13 A8 A9 A11 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 ~ A15 A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE1 I/O7 I/O 6 I/O 5 I/O4 I/O 3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3 2 A1 A2 3 CE2 WE 4 A3 A4 A5 5 A6 A7 6 A8 I/O0 I/O1 VCC VSS A B C D E F G H A0 I/O4 I/O5 VSS VCC I/O6 I/O7 A9 27 26 25 24 23 22 21 20 19 18 17 NC ~ ~ PRELIMINARY A62S7308BM A62S7308BV (A62S7308BX) NC OE CE1 NC A16 A12 A15 A13 I/O2 I/O3 A14 A10 A11 (March, 2001, Version 0.2) 1 AMIC Technology, Inc. A62S7308B Series Block Diagram A0 VCC GND A14 A15 A16 ROW DECODER 512 X 2048 MEMORY ARRAY I/O0 INPUT DATA CIRCUIT COLUMN I/O I/O7 CE2 CE1 OE WE CONTROL CIRCUIT Pin Descriptions - SOP Pin No. 1 2 - 12, 23, 25 - 28, 31 13 - 15, 17 - 21 16 22 24 29 30 32 Symbol NC A0 - A16 Description No Connection Address Inputs Pin Description - TSOP/sTSOP Pin No. 1 - 4, 7, 10 - 20, 31 5 6 8 9 21 - 23, 25 - 29 24 30 32 Symbol A0 - A16 WE Description Address Inputs Write Enable Chip Enable 2 Power Supply No Connection Data Inputs/Outputs Ground Chip Enable 1 Output Enable I/O0 - I/O7 GND CE1 OE WE Data Inputs/Outputs Ground Chip Enable 1 Output Enable Write Enable Chip Enable 2 Power Supply CE2 VCC NC I/O0 - I/O7 GND CE1 OE CE2 VCC PRELIMINARY (March, 2001, Version 0.2) 2 AMIC Technology, Inc. A62S7308B Series Recommended DC Operating Conditions (TA = 0°C to + 70°C or -25°C to 85°C) Symbol VCC GND VIH VIL CL TTL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Output Load Output Load Min. 2.7 0 2.4 -0.3 Typ. 3.0 0 Max. 3.6 0 VCC + 0.3 +0.6 30 1 Unit V V V V pF - Absolute Maximum Ratings* VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to + 4.6V IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC +...

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