Maker : Allegro MicroSystems
Part No. : A6B259KA

  Datasheet PDF : A6B259KA.pdf
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Shortcut : A6B259KA  A6B259KLW 

Product Information

6B259 ADVANCE INFORMATION (Subject to change without notice) January 24, 2000 8-BIT ADDRESSABLE DMOS POWER DRIVER The A6B259KA and A6B259KLW combine a 3-to-8 line CMOS decoder and accompanying data latches, control circuitry, and DMOS outputs in a multi-functional power driver capable of storing single-line data in the addressable latches or use as a decoder or demuliplexer. Driver applications include relays, solenoids, and other mediumcurrent or high-voltage peripheral power loads. The CMOS inputs and latches allow direct interfacing with microprocessor-based systems. Use with TTL may require appropriate pullup resistors to ensure an input logic high. Four modes of operation are selectable with the CLEAR and ENABLE inputs. The A6B259KA/KLW DMOS open-drain outputs are capable of sinking up to 500 mA. Similar devices with reduced rDS(on) are available as the A6259KA/KLW. The A6B259KA is furnished in a 20-pin dual in-line plastic package. The A6B259KLW is furnished in a 20-lead wide-body, small-outline plastic package (SOIC) with gull-wing leads for surfacemount applications. Copper lead frames, reduced supply current requirements, and low on-state resistance allow either device to sink 150 mA from all outputs continuously, to ambient temperatures greater than 85°C. Data Sheet 26186.122 NO (INTERNAL) CONNECTION LOGIC SUPPLY S 0 (LSB) OUT 0 OUT 1 OUT 2 OUT 3 S1 LOGIC GROUND POWER GROUND 1 2 3 4 NC VDD NC 20 19 18 17 NO (INTERNAL) CONNECTION CLEAR DATA OUT 7 OUT 6 OUT 5 OUT 4 ENABLE S 2 (MSB) POWER GROUND DECODER LOGIC LATCHES LATCHES 5 6 7 8 9 10 16 15 14 EN 13 12 11 Dwg. PP-050-1 Note that the A6B259KA (DIP) and the A6B259KLW (SOIC) are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS at TA = 25°C Output Voltage, VO ............................... 50 V Output Drain Current, Continuous, IO .......................... 150 mA* Peak, IOM ................................... 500 mA† Single-Pulse Avalanche Energy, EAS ................................................. 30 mJ Logic Supply Voltage, VDD .................. 7.0 V Input Voltage Range, VI ................................... -0.3 V to +7.0 V Package Power Dissipation, PD ........................................... See Graph Operating Temperature Range, TA ................................. -40°C to +125°C Storage Temperature Range, TS ................................. -55°C to +150°C * Each output, all outputs on. † Pulse duration ≤ 100 µs, duty cycle ≤ 2%. Caution: These CMOS devices have input static protection (Class 3) but are still susceptible to damage if exposed to extremely high static electrical charges. FEATURES s 50 V Minimum Output Clamp Voltage s 150 mA Output Current (all outputs simultaneously) s 5 Ω Typical rDS(on) s Low Power Consumption s Replacements for TPIC6B259N and TPIC6B259DW Always order by complete part number: Part Number Package A6B259KA 20-pin DIP A6B259KLW 20-lead SOIC RθJA 55°C/W 70°C/W RθJC 25°C/W 17°C/W 6B259 8-BIT ADDRESSABLE DMOS POWER DRIVER LOGIC SYMBOL ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS 2.5 3 8 12 13 18 0 8M 0/7 2 G8 Z9 Z10 9,0D 10,0R 9,1D 10,1R 9,2D 10,2R 9,3D 10,3R 9,4D 10,4R 9,5D 10,5R 9,6D 10,6R 4 5 6 7 14 15 16 17 2.0 SU FF IX 1.5 SU FF IX 'A ', R 19 θJ A = 'LW ', R 55 °C /W 1.0 θJ A =7 0° C/ W 0.5 0 25 50 75 100 125 AMBIENT TEMPERATURE IN °C 150 9,7D 10,7R Dwg. GS-004A Dwg. FP-046 VDD IN OUT Dwg. EP-063 Dwg. EP-010-15 LOGIC INPUTS DMOS POWER DRIVER OUTPUT FUNCTION TABLE Inputs CLEAR ENABLE DATA H H H L L L L L H L L H H L X H L X LATCH SELECTION TABLE Function Addressable Latch Memory 8-Line Demultiplexer Clear R = Previous State Addressed OUTPUT L H R L H H Other OUTPUTs R R R H H H Select Inputs Addressed S2 (MSB) S1 S0 (LSB) OUTPUT L L L L H H H L L H H L L H L H L H L H L 0 1 2 3 4 5 6 L = Low Logic Level H = High Logic Level X = Irrelevant H H H 7 115 Northeast Cutoff, Box 15036 Worcester, Mass...

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