Maker : Allegro MicroSystems
Part No. : A6B273KLW

  Datasheet PDF : A6B273KLW.pdf
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Product Information

6B273 ADVANCE INFORMATION (Subject to change without notice) January 24, 2000 8-BIT LATCHED DMOS POWER DRIVER The A6B273KA and A6B273KLW combine eight (positive-edgetriggered D-type) data latches and DMOS outputs for systems requiring relatively high load power. Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads. The CMOS inputs and latches allow direct interfacing with microprocessor-based systems. Use with TTL may require appropriate pull-up resistors to ensure an input logic high. The DMOS output inverts the DATA input. All of the output drivers are disabled (the DMOS sink drivers turned OFF) with the CLEAR input low. The A6B273KA/KLW DMOS open-drain outputs are capable of sinking up to 500 mA. Similar devices with reduced rDS(on) are available as the A6273KA/KLW. The A6B273KA is furnished in a 20-pin dual in-line plastic package. The A6B273KLW is furnished in a 20-lead wide-body, small-outline plastic package (SOIC) with gull-wing leads for surfacemount applications. Copper lead frames, reduced supply current requirements, and low on-state resistance allow both devices to sink 150 mA from all outputs continuously, to ambient temperatures over 85°C. Data Sheet 26180.122 CLEAR IN 1 IN 2 OUT 1 OUT 2 OUT 3 OUT 4 IN 3 IN 4 GROUND 1 2 3 4 VDD 20 19 18 17 LOGIC SUPPLY IN 8 IN 7 OUT 8 OUT 7 OUT 6 OUT 5 IN 6 IN 5 STROBE LATCHES LATCHES 5 6 7 8 9 10 16 15 14 13 12 11 Dwg. PP-015-2 Note that the A6B273KA (DIP) and the A6B273KLW (SOIC) are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS at TA = 25°C Output Voltage, VO ............................... 50 V Output Drain Current, Continuous, IO .......................... 150 mA* Peak, IOM ................................... 500 mA† Single-Pulse Avalanche Energy, EAS ................................................. 30 mJ Logic Supply Voltage, VDD .................. 7.0 V Input Voltage Range, VI ................................... -0.3 V to +7.0 V Package Power Dissipation, PD ........................................... See Graph Operating Temperature Range, TA ................................. -40°C to +125°C Storage Temperature Range, TS ................................. -55°C to +150°C * Each output, all outputs on. † Pulse duration ≤ 100 µs, duty cycle ≤ 2%. Caution: These CMOS devices have input static protection (Class 3) but are still susceptible to damage if exposed to extremely high static electrical charges. FEATURES s 50 V Minimum Output Clamp Voltage s 150 mA Output Current (all outputs simultaneously) s 5 Ω Typical rDS(on) s Low Power Consumption s Replacements for TPIC6B273N and TPIC6B273DW Always order by complete part number: Part Number Package A6B273KA 20-pin DIP A6B273KLW 20-lead SOIC RθJA 55°C/W 70°C/W RθJC 25°C/W 17°C/W 6B273 8-BIT LATCHED DMOS POWER DRIVER LOGIC SYMBOL ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS 2.5 1 11 SU FF IX R C1 1D 1D 1D 1D 1D 1D 1D 1D 4 5 6 7 14 15 16 17 2.0 2 'A ', R 1.5 SU FF IX θJ A = 3 55 °C /W 'LW ', R 8 9 12 13 18 1.0 θJ A =7 0° C/ W 0.5 0 25 50 75 100 125 AMBIENT TEMPERATURE IN °C 150 19 Dwg. GS-004A Dwg. FP-046-1 VDD IN OUT Dwg. EP-010-16 Dwg. EP-063 LOGIC INPUTS DMOS POWER DRIVER OUTPUT FUNCTION TABLE CLEAR L H H H Inputs STROBE X INX X H L X OUTX H L H R L L = Low Logic Level H = High Logic Level X = Irrelevant R = Previous State 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 W Copyright © 2000, Allegro MicroSystems, Inc. 6B273 8-BIT LATCHED DMOS POWER DRIVER FUNCTIONAL BLOCK DIAGRAM IN 1 STROBE D C1 CLR OUT 1 IN2 LOGIC SUPPLY IN 3 V DD D C1 CLR D C1 CLR OUT 2 OUT 3 IN 4 D C1 CLR OUT 4 IN5 D C1 CLR OUT 5 IN6 D C1 CLR OUT 6 IN 7 D C1 CLR OUT 7 IN8 D C1 OUT 8 GROUND CLEAR (ACTIVE LOW) CLR Dwg. FP-016-2 www.allegromicro.com 6B273 8-BIT LATCHED DMOS POWER DRIVER RECOMMENDED OPERATING CONDIT...

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