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Hex Inverting GatesMaker : National Semiconductor
Shortcut : DM74LS04 DM74LS04 DM74LS04E DM74LS04J DM74LS04M DM74LS04M DM74LS04N DM74LS04N DM74LS04SJ DM74LS04W |
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Product Information |
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54LS04 DM54LS04 DM74LS04 Hex Inverting Gates June 1989 54LS04 DM54LS04 DM74LS04 Hex Inverting Gates General Description This device contains six independent gates each of which performs the logic INVERT function Features Y Alternate Military Aerospace device (54LS04) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package TL F 6345 – 1 Order Number 54LS04DMQB 54LS04FMQB 54LS04LMQB DM54LS04J DM54LS04W DM74LS04M or DM74LS04N See NS Package Number E20A J14A M14A N14A or W14B Function Table YeA Input A L H H e High Logic Level L e Low Logic Level Output Y H L C1995 National Semiconductor Corporation TL F 6345 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range b 55 C to a 125 C DM54LS and 54LS DM74LS 0 C to a 70 C Storage Temperature Range b 65 C to a 150 C Note The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed The device should not be operated at these limits The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA Parameter Min Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Free Air Operating Temperature b 55 DM54LS04 Nom 5 Max 55 Min 4 75 2 07 b0 4 DM74LS04 Nom 5 Max 5 25 Units V V 08 b0 4 45 2 V mA mA C 4 125 0 8 70 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage High Level Output Voltage Low Level Output Voltage Conditions VCC e Min II e b18 mA VCC e Min IOH e Max VIL e Max VCC e Min IOL e Max VIH e Min IOL e 4 mA VCC e Min II IIH IIL IOS ICCH ICCL Input Current Input Voltage Max VCC e Max VI e 7V VCC e Max VI e 2 7V VCC e Max VI e 0 4V VCC e Max (Note 2) VCC e Max VCC e Max DM54 DM74 b 20 b 20 Min Typ (Note 1) Max b1 5 Units V V DM54 DM74 DM54 DM74 DM74 25 27 34 34 0 25 0 35 0 25 04 05 04 01 20 b 0 36 b 100 b 100 V mA mA mA mA High Level Input Current Low Level Input Current Short Circuit Output Current Supply Current with Outputs High Supply Current with Outputs Low 12 36 24 66 mA mA Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load) RL e 2 kX Symbol Parameter Min tPLH tPHL Propagation Delay Time Low to High Level Output Propagation Delay Time High to Low Level Output 3 3 CL e 15 pF Max 10 10 CL e 50 pF Min 4 4 Max 15 15 ns ns Units Note 1 All typicals are at VCC e 5V TA e 25 C Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second 2 3 Physical Dimensions inches (millimeters) Ceramic Leadless Chip Carrier Package (E) Order Number 54LS04LMQB NS Package Number E20A 14-Lead Ceramic Dual-In-Line Package (J) Order Number 54LS04DMQB or DM54LS04J NS Package Number J14A 4 Physical Dimensions inches (millimeters) (Continued) 14-Lead Small Outline Molded Package (M) Order Number DM74LS04M NS Package Number M14A 14-Lead Molded Dual-In-Line Package (N) Order Number DM74LS04N NS Package Number N14A 5 54LS04 DM54LS04 DM74LS04 Hex Inverting Gates Physical Dimensions inches (millimeters) (Continued) 14-Lead Ceramic Flat Package (W) Order Number 54LS04FMQB or DM54LS04W NS Package Number W14B LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPO... |
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