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Dual 4-channel analog multiplexer/demultiplexerMaker : Philips Semiconductors
Shortcut : HC4052 HC4052 HC4052 HC4052 HC4052 HC4052 HC4052 HC4053 HC4053AFT |
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INTEGRATED CIRCUITS DATA SHEET 74HC4052; 74HCT4052 Dual 4-channel analog multiplexer, demultiplexer Product specification Supersedes data of 2003 May 16 2004 Nov 11 Philips Semiconductors Product specification Dual 4-channel analog multiplexer, demultiplexer FEATURES • Wide analog input voltage range from −5 V to +5 V • Low ON-resistance: – 80 Ω (typical) at VCC − VEE = 4.5 V – 70 Ω (typical) at VCC − VEE = 6.0 V – 60 Ω (typical) at VCC − VEE = 9.0 V • Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals • Typical “break before make” built in • Complies with JEDEC standard no. 7A • ESD protection: – HBM EIA/JESD22-A114-B exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V. • Specified from −40 °C to +85 °C and −40 °C to +125 °C. APPLICATIONS • Analog multiplexing and demultiplexing • Digital multiplexing and demultiplexing • Signal gating. DESCRIPTION 74HC4052; 74HCT4052 The 74HC4052 and 74HCT4052 are high-speed Si-gate CMOS devices and are pin compatible with the HEF4052B. They are specified in compliance with JEDEC standard no. 7A. The 74HC4052 and 74HCT4052 are dual 4-channel analog multiplexers or demultiplexers with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When pin E = LOW, one of the four switches is selected (low-impedance ON-state) with pins S0 and S1. When pin E = HIGH, all switches are in the high-impedance OFF-state, independent of pins S0 and S1. VCC and GND are the supply voltage pins for the digital control inputs (pins S0, S1, and E). The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4052 and 4.5 V to 5.5 V for 74HCT4052. The analog inputs/outputs (pins nY0 to nY3 and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC − VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground). FUNCTION TABLE INPUT(1) CHANNEL BETWEEN E L L L L H Note 1. H = HIGH voltage level L = LOW voltage level X = don’t care. S1 L L H H X S0 L H L H X nY0 and nZ nY1 and nZ nY2 and nZ nY3 and nZ none 2004 Nov 11 2 Philips Semiconductors Product specification Dual 4-channel analog multiplexer, demultiplexer QUICK REFERENCE DATA VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns. 74HC4052; 74HCT4052 TYPICAL SYMBOL tPZH/tPZL tPHZ/tPLZ CI CPD CS PARAMETER turn-on time E or Sn to Vos turn-off time E or Sn to Vos input capacitance power dissipation capacitance per switch notes 1 and 2 maximum switch capacitance independent (Y) common (Z) Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ[(CL + CS) × VCC2 × fo] where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS = maximum switch capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; Σ[(CL + CS) × VCC2 × fo] = sum of the outputs. 2. For 74HC4052 the condition is VI = GND to VCC For 74HCT4052 the condition is VI = GND to VCC − 1.5 V. ORDERING INFORMATION PACKAGE TYPE NUMBER 74HC4052D 74HCT4052D 74HC4052DB 74HCT4052DB 74HC4052N 74HCT4052N 74HC4052PW 74HC4052BQ 74HCT4052BQ TEMPERATURE RANGE −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C PINS 16 16 16 16 16 16 16 16 16 PACKAGE SO16 SO16 SSOP16 SSOP16 DIP16 DIP16 TSSOP16 DHVQFN16 DHVQFN16 MATERIAL plastic plastic plastic plastic plastic plastic plastic plastic plastic CODE SOT109-3 SOT109-3 SOT338-1 SOT338-1 SOT38-9 SOT38-9 SOT403-1 SOT763-1 SOT763-1 CONDITIONS 74HC4052 74HCT4052 CL = 15 pF; RL = 1 kΩ; VCC = 5 V CL = 15 pF; RL = 1 kΩ; VCC = 5 V 28 21 3.5 5... |
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