Maker : ON Semiconductor
Part No. : N08L63W2A

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N08L63W2A 8Mb Ultra-Low Power Asynchronous CMOS SRAM 512K × 16 bit Overview The N08L63W2A is an integrated memory device containing a 8 Mbit Static Random Access Memory organized as 524,288 words by 16 bits. The device is designed and fabricated using ON Semiconductor’s advanced CMOS technology to provide both high-speed performance and ultra-low power. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. Byte controls (UB and LB) allow the upper and lower bytes to be accessed independently and can also be used to deselect the device. The N08L63W2A is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard packages compatible with other standard 512Kb x 16 SRAMs www.DataSheet4U.com Features • Single Wide Power Supply Range 2.3 to 3.6 Volts • Very low standby current 4.0µA at 3.0V (Typical) • Very low operating current 2.0mA at 3.0V and 1µs(Typical) • Very low Page Mode operating current 1.0mA at 3.0V and 1µs (Typical) • Simple memory control Dual Chip Enables (CE1 and CE2) Byte control for independent byte operation Output Enable (OE) for memory expansion • Low voltage data retention Vcc = 1.8V • Very fast output enable access time 25ns OE access time • Very fast Page Mode access time tAAP = 25ns • Automatic power down to standby mode • TTL compatible three-state output driver Product Family Part Number N08L63W2AB N08L63W2AB2 Package Type 48 - BGA 48 - BGA Green Operating Temperature Power Supply (Vcc) Speed Standby Operating Current (ISB), Current (Icc), Typical Typical 4 µA 2 mA @ 1MHz 70ns@2.7V -40oC to +85oC 2.3V - 3.6V 85ns @ 2.3V Pin Configuration 1 A B C D E F G H LB I/O8 I/O9 VSS VCC Pin Descriptions 6 CE2 I/O0 I/O2 VCC VSS I/O6 I/O7 NC 2 OE UB I/O10 I/O11 I/O12 3 A0 A3 A5 A17 NC A14 A12 A9 4 A1 A4 A6 A7 A16 A15 A13 A10 5 A2 CE1 I/O1 I/O3 I/O4 I/O5 WE A11 Pin Name A0-A18 WE CE1, CE2 OE LB UB I/O0-I/O15 VCC VSS NC Pin Function Address Inputs Write Enable Input Chip Enable Input Output Enable Input Lower Byte Enable Input Upper Byte Enable Input Data Inputs/Outputs Power Ground Not Connected I/O14 I/O13 I/O15 A18 NC A8 48 Pin BGA (top) 8 x 10 mm ©2008 SCILLC. All rights reserved. July 2008 - Rev. 8 Publication Order Number: N08L63W2A/D N08L63W2A Functional Block Diagram Address Inputs A0 - A3 Word Address Decode Logic www.DataSheet4U.com Address Inputs A4 - A18 Page Address Decode Logic 32K Page x 16 word x 16 bit RAM Array Input/ Output Mux and Buffers Word Mux I/O0 - I/O7 I/O8 - I/O15 CE1 CE2 WE OE UB LB Control Logic Functional Description CE1 H X X L L L CE2 X L X H H H WE X X X L H H OE X X X X3 L H UB X X H L1 L 1 LB X X H L1 L1 L1 I/O0 - I/O151 High Z High Z High Z Data In Data Out High Z MODE Standby2 Standby2 Standby2 Write3 Read Active POWER Standby Standby Standby Active Active Active L1 1. When UB and LB are in select mode (low), I/O0 - I/O15 are affected as shown. When LB only is in the select mode only I/O0 - I/O7 are affected as shown. When UB is in the select mode only I/O8 - I/O15 are affected as shown. 2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. 3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit. Capacitance1 Item Input Capacitance I/O Capacitance Symbol CIN CI/O Test Condition VIN = 0V, f = 1 MHz, TA = 25oC VIN = 0V, f = 1 MHz, TA = 25oC Min Max 8 8 Unit pF pF 1. These parameters are verified in device characterization and are not 100% tested Rev. 8 | Page 2 of 10 | www.onsemi.com N08L63W2A Absolute Maximum Ratings1 Item Voltage on any pin relative to VSS Voltage on VCC Supply Relative to VSS Power ...

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