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SPDT UltraCMOS RF Switch DC - 7500 MHzMaker : Peregrine Semiconductor
Shortcut : PE42552 |
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Product Information |
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Product Specification PE42552 Product Description The PE42552 RF Switch is designed for use in Test/ATE, cellular and other wireless applications. This broadband general purpose switch maintains excellent RF performance and linearity from DC through 7500 MHz. The PE42552 integrates on-board CMOS control logic driven by a single-pin, low voltage CMOS control input. It also has a logic select pin which enables changing the logic definition of the control pin. Additional features include a novel user defined logic table, enabled by the on-board CMOS circuitry. The PE42552 also exhibits outstanding isolation of 44 dB at 7500 MHz, fast settling time, and is offered in a tiny 3x3 mm QFN package. The PE42552 is manufactured on Peregrine’s UltraCMOS™ process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram RFC RF1 ESD SPDT UltraCMOS™ RF Switch DC - 7500 MHz Features • • • • • • • • • HaRP™-Technology-Enhanced • Eliminates Gate and Phase Lag • No insertion loss or phase drift • Fast settling time High linearity: 65 dBm IIP3 Low insertion loss: 0.65 dB at 3.0 GHz, 0.85 dB at 6.0 GHz, 1.0 at 7.5 GHz High isolation of 47 dB at 3.0 GHz, 44 dB at 7.5 GHz 1 dB compression point: +34.5 dBm typ. Logic Select pin to invert logic control High ESD: 1000 V HBM Absorptive switch design Standard 3x3 mm QFN package Figure 2. Package Type 16-lead 3x3 mm QFN ESD RF2 50Ω CMOS Control Driver 50Ω LS CTRL www.DataSheet4U.com Table 1. Target Electrical Specifications Temp = 25°C, VDD = 3.3V, VSS = 0V / -3.3V Parameter Operation Frequency MHz Insertion Loss 9 KHz 3000 MHz 6000 MHz 7500 MHz 3000 MHz 6000 MHz 7500 MHz 3000 MHz 6000 MHz 7500 MHz 3000 MHz 6000 MHz 7500 MHz 50% CTRL to 0.05 dB final value (-40 to +85 °C) Rising Edge 50% CTRL to 0.05 dB final value (-40 to +85 °C) Falling Edge 50% CTRL to 90% or 10% of final value (-40 to +85 °C) 800 MHz 7500 MHz 7500 MHz 7500 MHz 45 32 25 44 49 37 Conditions Min 9 kHz Typical 0.6 0.65 0.85 1.0 47 34 28 47 55 44 20 25 15 9 15 5 34.5 34 65 100 Max 7.5 GHz 0.7 0.8 1.0 1.22 Units dB dB dB dB dB dB dB dB dB dB dB dB dB Isolation – RF1 to RF2 Isolation – RFC to RFX Return Loss Settling Time Switching Time Input 1 dB Compression Input IP3 Input IP2 11 45 7 32 µs µs µs dBm dBm dBm dBm Document No. 70-0246-03 │ www.psemi.com ©2008 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 9 PE42552 Product Specification Figure 3. Pin Configuration (Top View) CTRL Vdd Vss LS Table 4. Absolute Maximum Ratings Symbol VDD VI Parameter/Conditions Power supply voltage Voltage on any input except for CTRL and LS inputs Voltage on CTRL input Voltage on LS input Storage temperature range Input Power: 9 kHz ≤ 1 MHz 1 MHz ≤ 7.5 GHz ESD voltage (HBM)1 ESD voltage (Machine Model) Min -0.3 -0.3 Max 4.0 VDD+ 0.3 4.0 4.0 150 fig. 4,5 30 1000 100 Units V V V V °C dBm dBm V V 16 15 14 GND RF1 GND GND 13 1 2 3 4 12 11 10 9 GND RF2 GND GND VCTRL VLS TST PIN VESD -65 5 6 7 GND GND GND RFC 8 Note: 1. Human Body Model (HBM, MIL_STD 883 Method 3015.7) Table 2. Pin Descriptions Pin No. 2 1, 3, 4, 5, 6, 8, 9, 10, 12 7 11 13 14 15 16 Pin Name RF1 GND RFC RF2 VSS CTRL LS VDD RF Port 1 Ground Description Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. RF Common RF Port 2 Negative supply voltage or GND connection (Note 1) CMOS level: Logic Select - Used to determine the definition for the CTRL pin (see Table 5) Nominal 3.3 V supply connection Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS™ device, observe the same precautions that you would use with other ESDsensit... |
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