Maker : Microchip Technology
Part No. : PIC24F16KA102

  Datasheet PDF : PIC24F16KA102.pdf
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www.DataSheet4U.com PIC24F16KA102 FAMILY PIC24F16KA102 Family Silicon Errata and Data Sheet Clarification The PIC24F16KA102 family devices that you have received conform functionally to the current Device Data Sheet (DS39927B), except for the anomalies described in this document. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in Table 1. The silicon issues are summarized in Table 2. The errata described in this document will be addressed in future revisions of the PIC24F16KA102 family silicon. Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated in the last column of Table 2 apply to the current silicon revision (A5). For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2 or PICkit™ 3: 1. Using the appropriate interface, connect the device to the MPLAB ICD 2 programmer/debugger or PICkit™ 3. From the main menu in MPLAB IDE, select Configure>Select Device and then select the target part number in the dialog box. Select the MPLAB hardware tool (Debugger>Select Tool). Perform a “Connect” operation to the device (Debugger>Connect). Depending on the development tool used, the part number and Device Revision ID value appear in the Output window. Note: If you are unable to extract the silicon revision level, please contact your local Microchip sales office for assistance. 2. 3. 4. Data Sheet clarifications and corrections start on page 5, following the discussion of silicon issues. The silicon revision level can be identified using the current version of MPLAB® IDE and Microchip’s programmers, debuggers and emulation tools, which are available at the Microchip corporate web site (www.microchip.com). The DEVREV values for the various PIC24F16KA102 family silicon revisions are shown in Table 1. TABLE 1: SILICON DEVREV VALUES Part Number Device ID 0B08h 0B0Ah 0B01h 0B03h 05h (1) Revision ID for Silicon Revision(2) A5 PIC24F08KA101 PIC24F08KA102 PIC24F16KA101 PIC24F16KA102 Note 1: 2: The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses in program memory. They are shown in hexadecimal in the format, “DEVID DEVREV”. Refer to the “PIC24FXXKAXXX Flash Programming Specification” (DS39919) for detailed information on Device and Revision IDs for your specific device. © 2009 Microchip Technology Inc. DS80473A-page 1 PIC24F16KA102 FAMILY www.DataSheet4U.com TABLE 2: Module CTMU Resets Core Core Memory Comparator SPI SILICON ISSUE SUMMARY Feature — BOR ICSP™ Deep Sleep Code Protection — Enhanced Buffer mode Item Number 1. 2. 3. 4. 5. 6. 7. Issue Summary Module operates in Sleep modes. Inadvertent Reset when disabling/enabling BOR. Unable to use PGC/PGD pair under certain conditions. Failure to avoid Deep Sleep entry. No direct jump to Boot Sector from Reset Vector. Change in maximum VIOFF. Errors when polling SPITBF flag. Affected Revisions(1) A5 X X X X X X X Note 1: Only those issues indicated in the last column apply to the current silicon revision. DS80473A-page 2 © 2009 Microchip Technology Inc. PIC24F16KA102 FAMILY www.DataSheet4U.com Silicon Errata Issues Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision (A5). 3. Module: Core (ICSP™) Under certain circumstances, a PGC/PGD pin pair may not function to enter ICSP Programming mode. This has been observed only when both the following conditions are met: • • Pin RA5 is configured as MCLR (FPOR<5> = 1), and The pins of the PGEC/PGED pair were configured as digital outputs (corresponding TRIS bit cleared) in software. 1. Module: CTMU The CTMU and its current source may continue to operate in Sleep mode. This results in current consumptio...

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