|
Free integrated circuits, diodes, triacs, and other semiconductors Datasheet Search and Download Site
| datasheet.co.kr > datasheet > ST8024 > COM/SEG LCD Driver |
|
|
COM/SEG LCD DriverMaker : Sitronix Technology
Shortcut : ST8024 ST8024 ST8024 ST8024L ST8024S ST8024T ST8024T ST802RT1A ST802RT1B |
|
Product Information |
|
ST8024 COM/SEG LCD Driver Datasheet Version 2.1 2009/08/19 Note: Sitronix Technology Corp. reserves the right to change the contents in this document without prior notice. This is not a final specification. Some parameters are subject to change. www.DataSheet4U.com ST8024 1 FEATURES Number of LCD drive outputs: 240 Supply voltage for LCD drive: +15.0 to +30.0 V Supply voltage for the logic system: +2.5 to +5.5 V Low power consumption Low output impedance (Segment mode) Shift clock frequency 20MHz(MAX.): VDD = +5.0 ± 0.5V 15MHz(MAX.): VDD = +3.0 to + 4.5V 12MHz(MAX.): VDD = +2.5 to + 3.0V Adopts a data bus system 4-bit/8-bit parallel input modes are selectable with a mode (MD) pin Automatic transfer function of an enable signal Automatic counting function which, in the chip selection mode, causes the internal clock to be stopped by automatically counting 240 bits of input data Line latch circuits are reset when /DISPOFF active (Common mode) Shift clock frequency: 4 MHz (MAX.) Built-in 240-bit bi-directional shift register (divisible into 120 bits x 2) Available in a single mode (240-bit shift register) or in a dual mode (120-bit shift register x 2) Y1->Y240 Single mode Y240->Y1 Single mode Y1->Yl20, Y121->Y240 Dual mode Y240->Y121, Yl20->Y1 Dual mode The above 4 shift directions are pin-selectable Shift register circuits are reset when /DISPOFF active 2 DESCRIPTION The ST8024 is a 240-output segment/common driver IC suitable for driving large/medium scale dot matrix LCD panels, and is used in personal computers/work stations. The ST8024 is good both as a segment driver and a common driver, and it can create a low power consuming, high-resolution LCD. www.DataSheet4U.com Ver 2.1 Page 2/28 2009/08/19 ST8024 3 BLOCK DIAGRAM V0R V12R V43R VSS Y1 Y2 Y239 Y240 FR /DISPOFF LEVEL SHIFTER VSS 240-BIT 4-LEVEL DRIVER 240 V43L V12L V0L EIO1 EIO2 ACTIVE CONTROL 240-BIT LEVEL SHIFTER 240 240-BIT LINE LATCH/SHIFT REGISTER 16 8 BIT DATA LATCH 16 16 LP XCK CONTROL LOGIC 8 L/R MD S/C SP CONVERSION & DATA CONTROL (4 to 8 or 8 to 8) DATA CONTROL DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7 VDD V SS 4 FUNCTIONAL OPERATIONS OF EACH BLOCK BLOCK FUNCTION In case of segment mode, controls the selection or non-selection of the chip. Following an LP signal input, and after the chip selection signal is input, a selection signal is generated internally until 240 bits of data have been read in. Once data input has been Active Control completed, a selection signal for cascade connection is output, and the chip is non-selected. In case of common mode, controls the input/output data of bi-directional pins. In case of segment mode, keeps input data which are 2 clocks of XCK at 4-bit parallel SP Conversion input mode in latch circuit, or keeps input data which are 1 clock of XCK at 8-bit parallel & Data Control input mode in latch circuit; after that they are put on the internal data bus 8 bits at a time. In case of segment mode, selects the state of the data latch which reads in the data bus Data Latch Control signals. The shift direction is controlled by the control logic. For every 16 bits of data read in, the selection signal shifts one bit based on the state of the control circuit. In case of segment mode, latches the data on the data bus. The latch state of each LCD Data Latch drive output pin is controlled by the control logic and the data latch control; 240 bits of data are read in 30 sets of 8 bits. In case of segment mode, all 240 bits which have been read into the data latch are Line Latch/ simultaneously latched at the falling edge of the LP signal, and are output to the level shifter block. In case of common mode, shifts data from the data input pin at the falling Shift Register edge of the LP signal. Level Shifter The logic voltage signal is level-shifted to the LCD drive voltage level, and is output to the driver block. Drives the LCD drive output pins from the line latch/shift register data, and selects one of 4-Leve... |
|
Link URL |
| http://www.datasheet.co.kr/datasheet-html/S/T/8/ST8024_SitronixTechnology.pdf.html |
|
Since 2010 - jixjix@gmail.com -
MOSFET -
TTL -
LINEAR VOLTAGE REGULATOR |