Maker : TEMIC Semiconductors
Part No. : U208

  Datasheet PDF : U208.pdf
  Cross Reference : U208 Cross Reference
  Buy Component : U208 Find Stock and Price

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Product Information

U208B Open Loop Phase Control Circuit Description The integrated circuit, U208B, is designed as a phase control circuit in bipolar technology with internal supply-voltage monitoring. As the voltage is built up, uncontrolled output pulses are avoided by internal monitoring. Furthermore, it has internal-current and voltage synchronisation. It is recommended as a low cost open-loop control. Features D Automatic retriggering D Triggering pulse typ. 125 mA D Voltage and current synchronisation D Internal supply voltage monitoring D Current requirement ≤ 2.5 mA Package: DIP8 Block Diagram BYT77 18 kW/ 2W R3 220 kW/ 0.5 W 7 Voltage detector 8 Current detector Automatic retriggering Output pulse 3 R7 180 W R4 470 kW/ 0.5 W D1 R1 M L 95 11224 TIC 236N VM = 230 V ~ 5 4 R2 180 kW R6 18 kW 100 kW R5 120 kW 6 10 nF C2 –VS C1 22 mF/ 25 V N Phase control unit ö = f (V6) 2 Supply voltage limitation Voltage monitoring 1 GND Figure 1. Block diagram for simple phase control system TELEFUNKEN Semiconductors Rev. A1, 28-May-96 1 (7) U208B Description Mains Supply The U208B is fitted with voltage limiting and can therefore be supplied directly from the mains. The supply voltage between Pin 1 (+ pol/ ) and Pin 2 builds up across D1 and R1 and is smoothed by C1. The value of the series resistance can be approximated using figure 1: R1 When the potential on Pin 5 reaches the given value of Pin 6, then a trigger pulse is generated whose width tp is determined by the value of C2 (the value of C2 and hence the pulse width can be evaluated by assuming 8 ms/nF). The current sensor on Pin 8 ensures that, for operation with inductive loads, no pulse will be generated in a new half cycle as long as the current from the previous half cycle is still flowing in the opposite direction to the supply voltage at that instant. This makes sure that ”Gaps” in the load current are prevented. The control signal on Pin 6 can be in the range 0 V to –7 V (reference point Pin 1). If Vpin6 = –7 V then the phase angle is at maximum = amax i.e., the current flow angle is a minimum. The minimum phase angle amin is when Vpin6 = Vpin1. + V2 –V I M S S Further information regarding the design of the mains supply can be found in the data sheets in the appendix. Operation using an externally stabilized DC voltage is not recommended. If the supply cannot be taken directly from the mains because the power dissipation in R1 would be too large, then the circuit shown in the following figure 2 should be employed. ~ Voltage Monitoring As the voltage is built up, uncontrolled output pulses are avoided by internal voltage surveillance. At the same time, all of the latches in the circuit are reset. Used with a switching hysteresis of 300 mV, this system guarantees defined start–up behavior each time the supply voltage is switched on ,or after short interruptions of the mains supply. 24 V~ 1 2 3 4 5 Pulse Output Stage R1 C1 95 10362 Figure 2. Supply voltage for high current requirements Phase Control The function of the phase control is largely identical to that of the well known component TEA1007. The phase angle of the trigger pulse is derived by comparing the ramp voltage, which is mains synchronized by the voltage detector, with the nominal value predetermined at the control input Pin 6. The slope of the ramp is determined by C2 and its charging current. The charging current can be varied using R2 on Pin 4. The maximum phase angle amax can also be adjusted using R2. The pulse output stage is short circuit protected and can typically deliver currents of 125 mA. For the design of smaller triggering currents, the function IGT = f (RGT) has been given in the data sheets in the appendix. In contrast to the TEA1007, the pulse output stage of the U 208 B has no gate bypass resistor. Automatic Retriggering The automatic retriggering prevents half cycles without current flow, even if the triacs is turned off earlier e.g. due to a collector which is not exact...

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