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Data AcquisitionMaker : Semtech
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XE8801A – SX8801R Sensing Machine Data Acquisition with ZoomingADC™ XE8801A – SX8801R Sensing Machine General Description Data Acquisition with 16+10 bit ZoomingADC™ The XE8801A is a data acquisition ultra lowpower, low-voltage, system on a chip (SoC) with a high efficiency embedded microcontroller unit (MCU), allowing for 1 MIPS at 300uA and 2.4 V, and multiplying in one clock cycle. The XE8801A includes a high acquisition path with16+10 bits. resolution Key product Features • • • • • • Low-power, high resolution ZoomingADC 0.5 to 1000 gain with offset cancellation up to 16 bits analog to digital converter up to 13 inputs multiplexer 2 MIPS with 2.4 V to 5.5 V operation 300 µA at 1 MIPS over voltage range • • • • • • Low-voltage low-power controller operation 22 kByte (8 kInstruction) MTP or ROM 520 Byte RAM data memory RC and crystal oscillators 5 reset, 22 interrupt, 8 event sources 100 years MTP Flash retention at 55°C The XE8801A is available with on chip ROM (this is called the SX8801R) or Multiple-Time-Programmable (MTP) program memory. Applications • Portable, battery operated instruments • Current loop powered instruments • Wheatstone www.DataSheet4U.com bridge interfaces • Pressure and chemical sensors • HVAC control • Metering • Sports watches, wrist instruments Ordering Information Item number* XE8801AMI027LF SX8801RIxxx SX8801IRxxLFTRT SX8801IRxxMLTRT Temperature range -40°C to 85 °C -40°C to 85 °C -40°C to 85 °C* -40°C to 85 °C Memory type MTP ROM ROM ROM Package ** LQFP44 die LQFP44 MLPQ44 *xx will be replaced by ROM identifier **MTP parts are conditioned in trays; ROM parts are conditioned in reels The XE8801A was previously called, and is the same as the XE8801LC01A. Rev 2 December 2009 www.semtech.com XE8801A – SX8801R Sensing Machine Data Acquisition with ZoomingADC™ TABLE OF CONTENTS Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8 Chapter 9 Chapter 10 Chapter 11 Chapter 12 Chapter 13 Chapter 14 Chapter 15 Chapter 16 Chapter 17 Chapter 18 Chapter 19 Chapter 20 XE8801AM - SX8801R Overview XE8801AM - SX8801R Performance XE8801AM - SX8801R CPU XE8801AM - SX8801R Memory System Block Reset generator Clock generation Interrupt handler Event handler Low power RAM Port A Port B Port C Universal Asynchronous Receiver/Transmitter (UART) Universal Synchronous Receiver/Transmitter (USRT) Acquisition Chain Voltage multiplier Counters/Timers/PWM The Voltage Level Detector XE8801AM - SX8801R Dimensions www.DataSheet4U.com © Semtech 2005 www.semtech.com XE8801A – SX8801R 1. General Overview CONTENTS 1.1 Top schematic 1.1.1 General description 1.1.2 XE88LC01 vs XE88LC01A vs XE8801A vs SX8801R 1.2 1.2.1 1.2.2 1.2.3 1.3 Pin map Bare die of XE8801AM Bare die of SX8801R LQFP-44 package Pin assignment 1-2 1-2 1-4 1-4 1-4 1-5 1-6 1-7 www.DataSheet4U.com © Semtech 2005 www.semtech.com 1-1 XE8801A – SX8801R 1.1 Top schematic 1.1.1 General description The top level block schematic of the circuit is shown in Figure 1-1. The heart of the circuit consists of the Coolrisc816® CPU core. This core includes an 8x8 multiplier and 16 internal registers. The bus controller generates all control signals for access to all data registers other than the CPU internal registers. The reset block generates the adequate reset signals for the rest of the circuit as a function of the set-up contained in its control registers. Possible reset sources are the power-on-reset (POR), the external pin RESET, the watchdog (WD), a bus error detected by the bus controller or a programmable pattern on Port A. Different low power modes are implemented. The clock generation and power management block sets up the clock signals and generates internal supplies for different blocks. The clock can be generated from the RC oscillator (this is the start-up condition), the crystal oscillator (XTAL) or an external clock source (given on the OSCIN pin). ... |
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